1. Field
This disclosure relates generally to reducing processor power consumption and, more specifically, to techniques for reducing processor power consumption through dynamic processor resource allocation.
2. Related Art
Traditionally, for computing systems, processor power consumption has been controlled by limiting processor performance through processor voltage/frequency scaling. For example, the Advanced Configuration and Power Interface (ACPI) specification provides an open standard for device configuration and power management via an operating system (OS).
The ACPI specification defines four global states (G0-G3) and six sleep states (S0-S5) for an ACPI-compliant computer system as follows: in the G0 (or S0) state a computer monitor is off, but background tasks are running; the G1 state is subdivided into the four states S1 through S4 (i.e., in the S1 state all processor caches are flushed, central processing units (CPUs) stop executing instructions, power to the CPUs and random access memory (RAM) is maintained, and devices that do not indicate they must remain on may be powered down; in the S2 state the CPUs are powered off and dirty cache is flushed to RAM; in the S3 state RAM remains powered; and in the S4 state all content of main memory is saved to non-volatile memory (NVM), such as a hard drive, and main memory is powered down); in the G2 (or S5) state (which is similar to the G3 state, except that the power supply unit still supplies power, at a minimum, to the power button to allow return to the state S0), a full reboot is required, no previous content is retained, and other components may remain powered so the computer system can wake on input from the keyboard, clock, modem, local area network (LAN), or universal serial bus (USB) device, etc.; and in the G3 state where the computer's power has been totally removed via a mechanical switch, the power cord can be removed, and the system is safe for disassembly (typically, only the real-time clock continues to run using its own small battery).
According to the ACPI specification, processor power states are defined as follows: the C0 state is the operating state; the C1 state is where the processor is not executing instructions, but can return to an executing state essentially instantaneously; the C2 state is where the processor maintains all software-visible states, but may take longer to wake up; and the C3 state is where the processor does not need to keep its cache coherent but maintains other states. According to the ACPI specification, an operating processor can be in one of several power-performance states (e.g., P0-Pn) that are implementation-dependent. In any case, the P0 state is always the highest-performance state, with P1 to Pn being successively lower-performance states, up to an implementation-specific limit of n no greater than 16. In the P0 state a processor is at maximum power and frequency. At successive P1-P15 states a processor voltage/frequency is scaled to a greater degree to utilize less power, albeit at lower performance.